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october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector TISP61089B dual forward-conducting p-gate thyristors programmable overvoltage protectors device symbol dual voltage-programmable protectors - supports battery voltages down to -155 v - low 5 ma max. gate triggering current - high 150 ma min. holding current rated for lssgr 1089 conditions d package (top view) 2/10 overshoot voltage specified how to order rated for itu-t k.20, k.21 and k.45 impulse waveshape 1089 test i tsp a section test # 2/10 4.5.7 4.5.8 4 1 120 10/360 4.5.7 2, 5 30 10/1000 4.5.7 1,3 30 element i tm = 100 a, di/dt = 80 a/ s v diode 10 scr 12 md6xanb nc - no internal connection terminal typical application names shown in parenthesis 1 2 3 4 5 6 7 8 k1 a a k2 g k1 k2 nc (tip) (ground) (ground) (ring) (gate) (tip) (ring) sd6xaeb k1 k2 a a g k1 k2 te rminals k1, k2 and a correspond to the alternative line designators of t, r and g or a, b and c. the negative protection voltage is controlled by the voltage, v gg, applied to the g terminal. waveshape i tsp a voltage current 10/700 5/310 40 description the TISP61089B is a dual forward-conducting buffered p-gate thyristor (scr) overvoltage protector. it is designed to protect mo nolithic slics (subscriber line interface circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and ind uction. the TISP61089B limits voltages that exceed the slic supply rail voltage. the TISP61089B parameters are specified to allow equipment compliance with bellcore gr-1089-core, issue 2 and itu-t recommendations k.20, k.21 and k.45. 60 hz power fault times 1089 test i tsm a section test # 0.5 4.5.12 9 6.5 1 4.5.12 3, 4, 8 4.6 24.5.1273.4 5 4.5.12 4.5.13 5 2, 3 2.3 30 4.5.12 6 1.3 900 4.5.12 4.5.13 4.5.15/16 1, 2 1, 4, 5 0.73 ............................................ ul recognized components *rohs directive 2002/95/ec jan 27 2003 including annex *rohs compliant device package carrier ti sp61089b d (8-p i n smal l - outl i n e ) embossed tape reeled TISP61089Bdr-s order as
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. description (continued) the slic line driver section is typically powered from 0 v (ground) and a negative voltage in the region of -20 v to -150 v. th e protector gate is connected to this negative supply. this references the protection (clipping) voltage to the negative supply voltage. the protec tion voltage will then track the negative supply voltage and the overvoltage stress on the slic is minimized. positive overvoltages are clipped to ground by diode forward conduction. negative overvoltages are initially clipped close to t he slic negative supply rail value. if sufficient current is available from the overvoltage, then the protector scr will switch into a low volta ge on-state condition. as the overvoltage subsides, the high holding current of TISP61089B scr prevents d.c. latchup. the TISP61089B is intended to be used with a series combination of a 40 ? or higher resistance and a suitable overcurrent protector. power fault compliance requires the series overcurrent element to open-circuit or become high impedance (see applications information ). for equipment compliant to itu-t recommendations k.20 or k.21 or k.45 only, the series resistor value is set by the coordination re quirements. for coordination with a 400 v limit gdt, a minimum series resistor value of 10 ? is recommended. these monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and i n normal system operation they are virtually transparent. the TISP61089B buffered gate design reduces the loading on the slic supply during ove rvoltages caused by power cross and induction. the TISP61089B is available in a 8-pin plastic small-outline surface mount package. TISP61089B high voltage ringing slic protector absolute maximum ratings, -40 c t j 85 c (unless otherwise noted) rating symbol value unit repetitive peak off-state voltage, v gk =0 v drm -170 v repetitive peak gate-cathode voltage, v ka =0 v gkrm -167 v non-repetitive peak on-state pulse current (see notes 1 and 2) i tsp a 10/1000 s (telcordia (bellcore) gr-1089-core, issue 2, february 1999, section 4) 5/320 s (itu-t k.20, k.21& k.45, k.44 open-circuit voltage wave shape 10/700 s) 10/360 s (telcordia (bellcore) gr-1089-core, issue 2, february 1999, section 4) 30 40 40 1.2/50 s (telcordia (bellcore) gr-1089-core, issue 2, february 1999, section 4) 100 2/10 s (telcordia (bellcore) gr-1089-core, issue 2, february 1999, section 4) t j = 25 c 120 170 non-repetitive peak on-state current, 60 hz (see notes 1, 2 and 3) i tsm a 0.5 s 6.5 1s 2s 5s 30 s 900 s 4.6 3.4 2.3 1.3 0.73 non-repetitive peak gate current, 1/2 s pulse, cathodes commoned (see notes 1 and 2) i gsm +40 a operating free-air temperature range t a -40 to +85 c junction temperature t j -40 to +150 c storage temperature range t stg -40 to +150 c notes: 1. initially, the protector must be in thermal equilibrium with -40 c t j 85 c. the surge may be repeated after the device returns to its initial conditions. 2. the rated current values may be applied either to the ring to ground or to the tip to ground terminal pairs. additionally, bo th terminal pairs may have their rated current values applied simu ltaneously (in this case the ground terminal current will be twi ce the rated current value of an i ndividual terminal pair). above 85 c, derate linearly to zero at 150 c lead temperature. 3. values for v gg = -100 v. for values at other voltages see figure 2.
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector recommended operating conditions electrical characteristics, t j = 25 c (unless otherwise noted) component min typ max unit c g TISP61089B gate decoupling capacitor 100 220 nf r s TISP61089B series resistor for gr-1089-core first-level surge survival 25 ? TISP61089B series resistor for gr-1089-core first-level and second-level surge survival 40 ? TISP61089B series resistor for gr-1089-core intra-building port surge survival 8 ? TISP61089B series resistor for k.20, k.21 and k.45 coordination with a 400 v primary protector 10 ? parameter test conditions min typ max unit i d off-state current v d =v drm , v gk =0 t j = 25 c-5 a t j = 85 c-50 a v (bo) breakover voltage 2/10 s, i tm = -100 a, di/dt = -80 a/ s, r s =50 ? , v gg = -100 v -112 v v gk(bo) gate-cathode impulse breakover voltage 2/10 s, i tm = -100 a, di/dt = -80 a/ s, r s =50 ? , v gg =-100v, (see note 4) 12 v v f forward voltage i f =5a, t w = 200 s3v v frm peak forward recovery voltage 2/10 s, i f = 100 a, di/dt = 80 a/ s, r s =50 ? , (see note 4) 10 v i h holding current i t = -1 a, di/dt = 1a/ms, v gg = -100 v -150 ma i gks gate reverse current v gg =v gk =v gkrm , v ka =0 t j = 25 c-5 a t j = 85 c-50 a i gt gate trigger current i t =-3a, t p(g) 20 s, v gg = -100 v 5 ma v gt gate-cathode trigger voltage i t =-3a, t p(g) 20 s, v gg = -100 v 2.5 v c ka cathode-anode off- state capacitance f=1mhz, v d =1v, i g = 0, (see note 5) v d = -3 v 100 pf v d =-48v 50 pf notes: 4. the diode forward recovery and the thyristor gate impulse breakover (overshoot) are not strongly dependent of the gate supply voltage value (v gg ). 5. these capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. the unmeasured device terminals are a.c. connected to the guard terminal of the bridge. thermal characteristics parameter test conditions min typ max unit r ja junction to free air thermal resistance t a = 25 c, eia/jesd51-3 pcb, eia/ jesd51-2 environment, p tot = 1.7 w 120 c/w
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector parameter measurement information figure 1. voltage-current characteristic unless otherwise noted, all voltages are referenced to the anode -v i s v s v gg v d i h i t v t i tsm i tsp v (bo) i (bo) i d quadrant i forward conduction characteristic +v +i i f v f i fsm (= ) | tsm i fsp (= ) | tsp -i quadrant iii switching characteristic pm6xaaa v gk(bo)
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector thermal information figure 2. non-repetitive peak on-state current against duration peak non-recurring ac vs current duration t current duration s 0.01 0.1 1 10 100 1000 i tsm peak non-recurrent 50 hz current a 0.5 0.6 0.7 0.8 1.5 2 3 4 5 6 7 8 15 20 1 10 v gg = -60 v v gg = -80 v v gg = -100 v v gg = -120 v ring and tip terminals: equal i tsm values applied simultaneously ground terminal: current twice i tsm value eia /jesd51 environment and pcb, t a = 25 c ti61af figure 3. typical non-repetitive peak on-state current against duration typical peak non-recurring ac vs current duration t current duration s 0.01 0.1 1 10 100 1000 i tsm peak non-recurrent 50 hz current a 0.5 0.6 0.7 0.8 1.5 2 3 4 5 6 7 8 15 20 1 10 ring and tip terminals: equal i tsm values applied simultaneously ground terminal: current twice i tsm value v gg = -100 v v gg = -120 v typical pcb mounting, t a = 25 c v gg = -60 v v gg = -80 v ti61da
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector applications information operation of ringing slics using multiple negative voltage supply rails figure 4 shows a typical powering arrangement for a multi-supply rail slic. v batl is a lower (smaller) voltage supply than v bath . with supply switch s1 in the position shown, the line driver amplifiers are powered between 0 v and v batl . this mode minimizes the power consumption for short loop transmission. for long loops and to generate ringing, the driver voltage is increased by operating s1 to connect v bath . these conditions are shown in figure 5. figure 4. slic with voltage supply switching s1 line drivers v bath 0 v slic ai6xcc supply switch line v batl figure 5. driver supply voltage levels 0 v 0 v v batl short loop v bath long loop v dcring v slicg v pkring /2 v slich ai6xcd v bath v bath ringing v pkring /2 v pkring /2 v pkring /2 0 v conventional ringing is typically unbalanced ground or battery backed. to minimize the supply voltage required, most multi-rail slics use balanced ringing as shown in figure 5. the ringing has d.c., v dcring , and a.c., v pkring , components. a 70 v r.m.s. a.c. sinusoidal ring signal has a peak value, v pkring , of 99 v. if the d.c. component was 20 v, then the total voltage swing needed would be 99 + 20 = 119 v. there are internal losses in the slic from ground, v slicg , and the negative supply, v slich . the sum of these two losses generally amounts to a total of 10 v. this makes a total, v bath , supply rail value of 119 + 10 = 129 v. in some cases a trapezoidal a.c. ring signal is used. this would have a peak to r.m.s ratio (crest factor) of about 1.25, incre asing the r.m.s. a.c. ring level by 13 %. the d.c. ring voltage may be lowered for short loop applications.
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector slic parameter values the table below shows some details of hv slics using multiple negative supply rails. manufacturer infineon? legerity?? unit slic series slic-p? islic?? slic # peb 4266 79r241 79r101 79r100 data sheet issue 14/02/2001 -/08/2000 -/07/2000 -/07/2000 short circuit current 110 150 150 150 ma v bath max. -155 -104 -104 -104 v v batl max. -150 -104 v bath v bath v ac ringing for: 85 45? 50? 55? v rms crest factor 1.4 1.4 1.4 1.25 v bath -70 -90 -99 -99 v v batr -150 -36 -24 -24 v r or t power max. < 10 ms 10 w r or t overshoot < 10 ms tbd tbd -5 5 -10 5 -10 5 v r or t overshoot < 1 ms -10 +10 v r or t overshoot < 1 s -10 +30 -10 10 -15 8 -15 8 v r or t overshoot < 250 ns -15 15 -20 12 -20 12 v line feed resistance 20 + 30 50 50 50 ? ? assumes -20 v battery voltage during ringing. ? legerity, the legerity logo and islic are the trademarks of legerity, inc. (formerly amds communication products division). other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. from the table, the maximum supply voltage, v bath , is -155 v. in terms of minimum voltage overshoot limits, -10 v and +8 v are needed for 1 s and -15 v, +12 v are needed for 250 ns. to maintain these voltage limits over the temperature range, 25 c values of -12 v, +10 v are needed for 250 ns. it is important to define the protector overshoot under the actual circuit current conditions. for example, if the series line feed resistor was 40 ? , r1 in figure 12, and telcordia gr-1089-core 2/10 and 10/1000 first-level impulses were applied, the peak protector currents w ould be 56 a and 20 a. at the second-level, the 2/10 impulse current would be 100 a. therefore, the protector voltage overshoot should be guaranteed to not exceed the slic voltage ratings at 100 a, 2/10 and 20 a, 10/1000. in practice, as the 2/10 waveshape has the highest cur rent (100 a) and fastest di/dt (80 a/ s) the overshoot level testing can restricted to the be 2/10 waveshape. using the table values for maximum battery voltage and minimum overshoot gives a protection device requirement of -170 v and +1 2 v from the output to ground. there needs to be temperature guard banding for the change in protector characteristics with temperature. to cover down to -40 c, the 25 c protector minimum values become -185 v (v drm ) on the cathode and -182 v (v gks ) on the gate. this section covers four topics. first, it is explained why gated protectors are needed. second, the voltage limiting action of the protector is described. third, how the withstand voltages of the TISP61089B junctions are set. fourth, an example application circuit is des cribed. purpose of gated protectors fixed voltage thyristor overvoltage protectors have been used since the early 1980s to protect monolithic slics (subscriber lin e interface circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. as the slic was usu ally powered from a fixed voltage negative supply rail, the limiting voltage of the protector could also be a fixed value. the tisp1072f3 is a typical example of a fixed voltage slic protector. gated protectors
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector gated protectors (continued) slics have become more sophisticated. to minimize power consumption, some designs automatically adjust the driver supply voltag e to a value that is just sufficient to drive the required line current. for short lines, the supply voltage would be set low, but for long lines, a higher supply voltage would be generated to drive sufficient line current. the optimum protection for this type of slic would be given by a protection voltage which tracks the slic supply voltage. this can be achieved by connecting the protection thyristor gate to the slic v bath supply, figure 6. this gated (programmable) protection arrangement minimizes the voltage stress on the slic, no matter what value of su pply voltage. figure 6. TISP61089B buffered gate protector (1089 section 4.5.12 testing) r1 40 ? ? ? ? ring wire tip wire slic TISP61089B v bath c1 220 nf ai6xcc 600 ? ? ? ? 600 ? ? ? ? a.c. generator 0 - 600 v r.m.s. switching mode power supply generator source resistance i g i slic c2 d1 tx r2 40 ? ? ? ? v batl i bath figure 7. negative overvoltage condition i g th5 slic slic protector i k ai6xahb v bath tisp 61089b c1 220 nf figure 8. positive overvoltage condition th5 slic v bath slic protector tisp 61089b c1 220 nf i f ai6xaib operation of gated protectors figure 7 and figure 8 show how the TISP61089B limits negative and positive overvoltages. positive overvoltages (figure 8) are c lipped by the antiparallel diode of th5 and the resulting current is diverted to ground. negative overvoltages (figure 7) are initially clipp ed close to the slic negative supply rail value (v bath ). if sufficient current is available from the overvoltage, then th5 will switch into a low voltage on-state condition. as the overvoltage subsides the high holding current of th5 prevents d.c. latchup. the protection voltage will be th e sum of the gate supply (v bath ) and the peak gate-cathode voltage (v gk(bo) ). the protection voltage will be increased if there is a long connection between the gate decoupling capacitor, c1, and the gate terminal. during the initial rise of a fast impulse, the gate current (i g ) is the same as the cathode current (i k ). rates of 80 a/ s can cause inductive voltages of 0.8 v in 2.5 cm of printed wiring track. to minimize this inductive voltage increase of
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector gated protectors (continued) protection voltage, the length of the capacitor to gate terminal tracking should be minimized. inductive voltages in the protec tor cathode wiring will also increase the protection voltage. these voltages can be minimized by routing the slic connection through the protector as shown in figure 6. figure 9, which has a 10 a/ s rate of impulse current rise, shows a positive gate charge (q gs ) of about 0.1 c. with the 0.1 f gate decoupling capacitor used, the increase in gate supply is about 1 v (= q gs /c1). this change is just visible on the -72 v gate voltage, v bath . but, the voltage increase does not directly add to the protection voltage as the supply voltage change reaches a maximum at 0.4 s, when the gate current reverses polarity, and the protection voltage peaks earlier at 0.3 s. in figure 9, the peak clamping voltage (v (bo) ) is -77.5 v, an increase of 5.5 v on the nominal gate supply voltage. this 5.5 v increase is the sum of the supply rail increase at that time, (0.5 v), and the protection circuits cathode diode to supply rail breakover voltage (5 v). in practice, use of the recommended 220 nf gate deco upling capacitor would give a supply rail increase of about 0.3 v and a v (bo) value of about -77.3 v. figure 9. protector fast impulse clamping and switching waveforms time - s 0.0 0.5 1.0 1.5 volt age - v -80 -60 -40 -20 0 v k time - s 0.0 0.5 1.0 1.5 current - a -5 -4 -3 -2 -1 0 1 i k i g q gs v bath ai6xde voltage stress levels on the TISP61089B figure 10 shows the protector electrodes. the package terminal designated gate, g, is the transistor base, b, electrode connect ion and so is marked as b (g). the following junctions are subject to voltage stress: transistor eb and cb, scr ak (off state) and the antipa rallel diode (reverse blocking). this clause covers the necessary testing to ensure the junctions are good. testing transistor cb and eb: the maximum voltage stress level for the TISP61089B is v bath with the addition of the short term antiparallel diode voltage overshoot, v frm . the current flowing out of the g terminal is measured at v bath plus v frm . the scr k terminal is shorted to the common (0 v) for this test (see figure 10). the measured current, i gks , is the sum of the junction currents i cb and i eb .
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector gated protectors (continued) summary: two tests are needed to verify the protector junctions. maximum current values for i gks and i d are required at the specified applied voltage conditions. testing transistor cb, scr ak off state and diode reverse blocking: the highest ak voltage occurs during the overshoot period of the protector. to make sure that the scr and diode blocking junctions do not break down during this period, a d.c. test for off-sta te current, i d , can be applied at the overshoot voltage value. to avoid transistor cb current amplification by the transistor gain, the transis tor base-emitter is shorted during this test (see figure 11). figure 10. transistor cb and eb verification v bath + v frm tisp 61089b ai6xce 0 v k b (g) i eb i cb i gks figure 11. off-state current verification 0 v ai6xcf 0 v k b (g) i cb v (bo) tisp 61089b i d(i) i d a i d(i) is the internal scr value of i d i r figure 12. typical application circuit test relay ring relay slic relay test equip- ment ring generator s1a s1b r1a r1b ring wire tip wire th1 th2 th3 th4 th5 slic slic protector ring/test protection over- current protection s2a s2b tisp 3xxxf3 or 7xxxf3 s3a s3b ai6xajb v bath tisp 61089b c1 220 nf
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. gr-1089-core, 1089, covers electromagnetic compatibility and electrical safety generic criteria for us network telecommunicat ion equipment. it is a module in volume 3 of lssgr (lata (local access transport area) switching systems generic requirements, fr-nwt-000064). in 1089, surge and power fault immunity tests are done at two levels. after first-level testing, the equipment shall not be damaged and shall continue to operate correctly. under second-level testing, the equipment shall not become a safety hazard. th e equipment is permitted to fail as a result of second-level testing. when the equipment is to be located on customer premises, second-leve l testing includes a wiring simulator test, which requires the equipment to reduce the power fault current below certain values. the following clauses reference the 1089 section and calculate the protector stress levels. the TISP61089B needs a 40 ? series resistor to survive second-level surge testing. to survive first-level testing and possibly fail under second-level testing allows lower re sistor value of 25 ? to be used. tabulated current values are given for both 40 ? and 25 ? series resistor values. figure 12 shows a typical TISP61089B slic card protection circuit. the incoming line conductors, ring (r) and tip (t), connect to the relay matrix via the series overcurrent protection. fusible resistors, fuses and positive temperature coefficient (ptc) resistors can be used for overcurrent protection. resistors will reduce the prospective current from the surge generator for both the TISP61089B and the ring/test protector. the tisp7xxxf3 protector has the same protection voltage for any terminal pair. this protector is used when the ring generator configuration may be ground or battery-backed. for dedicated ground-backed ringing generators, the tisp3xxxf3 gives better prot ection as its inter-conductor protection voltage is twice the conductor to ground value. relay contacts 3a and 3b connect the line conductors to the slic via the TISP61089B protector. the protector gate reference vol tage comes from the slic negative supply (v bath ). a 220 nf gate capacitor sources the high gate current pulses caused by fast rising impulses. TISP61089B high voltage ringing slic protector application circuit lssgr 1089 1089 section 4.5.5 - test generators the generic form of test generator is shown in figure 13. it emphasises that multiple outputs must be independent, i.e. the loa ding condition of one output must not affect the waveforms of the other outputs. it is a requirement that the open-circuit voltage and short circ uit current waveforms be recorded for each generator output used for testing. the fictive impedance of a generator output is defined as the peak open- circuit voltage divided by the peak short-circuit current. specified impulse waveshapes are maximum rise and minimum decay time s. thus, the 10/1000 waveshape should be interpreted as <10/>1000 and not the usually defined nominal values which have a tolerance. figure 13. 1089 test generators or generic lightning or ac test generator z is the fictive current-limiting impedance in each output feed z z output 1 output 2 return z z output n output n + 1 ai6xcj
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector 1089 section 4.5.5 - test generators (continued) the exception to these two conditions of independence and limit waveshape values is the alternative ieee c.62.41, 1.2/50-8/20 c ombination wave generator which may be used for testing in 1089 sections 4.5.7, 4.5.8 and 4.5.9. here, the quoted waveshape values are no minal with defined tolerance. the open-circuit voltage waveshape is 1.2 s 0.36 s front time and 50 s 10 s duration. the short-circuit current waveshape is 8 s+1.0 s, -2.5 s front time and 20 s+8 s, -4 s duration. the generator fictive source impedance (peak open-circuit voltage divided by peak short-circuit current) is 2.0 ? 0.25 ? . to get the same peak short-circuit currents as the 2/10 generator, for the same peak open-circuit voltage setting, 1089 specif ies that the 1.2/50-8/20 generator be used with external resistors for current limiting and sharing. when working into a finite resistive lo ad, the delivered 1.2/50-8/20 generator current waveshape moves towards the 1.2/50 voltage waveshape. thus, although the 1.2/50-8/20 delivered pe ak current is similar to the 2/10 generator, the much longer current duration means that a much higher stress is imposed on the eq uipment protection circuit. this can cause fuses to operate which are perfectly satisfactory on the normal 2/10 generator. testing with the 1.2/50-8/20 generator gives higher stress levels than the 2/10 generator and, because it is seldom used, will not be covered in this analys is. figure 14. longitudinal (also called common mode) testing te st generator output 1 ring return eut (equipment under test) ground tip output 2 v1 v2 ai6xck figure 15. transverse (also called differential or metallic) testing test generator output 1 ring return eut (equipment under test) ground tip output 2 v1 test generator output 1 ring return eut (equipment under test) ground tip output 2 v2 ai6xcm
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector 1089 section 4.5.6 - test connections 1089 section 4.5.7 - first-level lightning surge testing table 1 shows the tests for this section. the peak TISP61089B current, i tm , is calculated by dividing the generator open voltage by the sum of the generator fictive source and the line feed, r s , resistance values. columns 9 and 10 show the resultant currents for r s values of 25 ? and 40 ? . the TISP61089B rated current values at the various waveshapes are higher than those listed in table 1. used with the specifie d values of r s , the TISP61089B will survive these tests. table 1. first-level surge currents 1089 section 4.5.8 - second-level lightning surge testing table 2 shows the 2/10 test used for this section. columns 9 and 10 show the resultant currents for r s values of 25 ? and 40 ? . used with an r s of 40 ? , the TISP61089B with survive this test. the 25 ? value of r s is only intended to give first-level (section 4.5.7) survival. under second-level conditions, the peak current will be 2x143 a, which may result in failure of the 2x120 a rated TISP61089B. however , if the testing is done at or near 25 c, the TISP61089B will survive with an r s value of 25 ? as the 2/10 rating is 170 a at this temperature. table 2. second-level surge current the telecommunications port r and t terminals may be tested simultaneously or individually. figure 14 shows connection for simu ltaneous (longitudinal) testing. figure 15 shows the two connections necessary to individually test the r and t terminals during transve rse testing. the values of protector current are calculated by dividing the open-circuit generator voltage by the total circuit resistance. the total circuit resistance is the sum of the generator fictive source resistance and the TISP61089B series resistor value. the starting point o f this analysis is to calculate the minimum circuit resistance for a test by dividing the generator open-circuit voltage by the TISP61089B rating. subtracting the generator fictive resistance from the minimum circuit resistance gives the lowest value of series resistance that can be used. this is repeated for all test connections. as the series resistance must be a fixed value, the value used has to be the highest value calculated from all the considered test connections. where both 10/1000 and 2/10 waveshape testing occurs, the 10/1000 test connection gives the highes t value of minimum series resistance. unless otherwise stated, the analysis assumes a -40 c to +85 c temperature range. surge # waveshape open-circuit vo l t a g e v short-circuit current a no of tests test connections primary fitted generator fictive source resistance ? TISP61089B i tm a r s = 25 ? r s = 40 ? 1 10/1000 600 100 +25, -25 transverse & longitudinal no 6 19 & 2x19 13 & 2x13 2 10/360 1000 100 +25, -25 transverse & longitudinal no 10 29 & 2x29 20 & 2x20 3 10/1000 1000 100 +25, -25 transverse & longitudinal no 10 29 & 2x29 20 & 2x20 4 2/10 2500 500 +10, -10 longitudinal no 5 2x83 2x56 5 10/360 1000 25 +5, -5 longitudinal no 40 2x15 2x13 notes: 1. surge 3 may be used instead of surge 1 and surge 2. 2. surge 5 is applied to multiple line pairs up to a maximum of 12. 3. if the equipment contains a voltage-limiting secondary protector, each test is repeated at a voltage just below the threshold of limiting. surge # wa veshape open-circuit vo l t a ge v short-circuit current a no of te s t s te s t connections primary fitted generato r fictive source resistance ? ? ? ? TISP61089B i tm a r s = 25 ? ? ? ? r s = 40 ? ? ? ? 1 2/10 5000 500 +1, -1 longitudinal no 10 2x143 2x100 note: 1. if the equipment contains a voltage-limiting secondary protector, the test is repeated at a voltage just below the thres hold of limiting.
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector 1089 section 4.5.9 - intra-building lightning surge testing this test is for network equipment ports that do not serve outside lines. table 3 shows the 2/10 tests used for this section. d edicated intra- building ports may use an r s value of 8 ? . the 8 ? value is set by the intra-building second-level a.c. testing of section 4.5.16. columns 9, 10 and 11 show the resultant currents for r s values of 8 ? , 25 ? and 40 ? . the listed currents are lower than the TISP61089B current rating of 2x120 a and the TISP61089B will survive these tests. table 3. intra-building lightning surge currents surge # wa veshape open-circuit vo l ta ge v short-circuit current a no of te s t s te s t connections primary fitted generator fictive source resistance ? ? ? ? TISP61089B i tm a r s = 8 ? ? ? ? r s = 25 ? ? ? ? r s = 40 ? ? ? ? 1 2/10 800 100 +1, -1 transverse na 8 50 24 17 2 2/10 1500 100 +1, -1 longitudinal na 15 2x65 2x38 2x27 note: 1. if the equipment contains a voltage-limiting secondary protector, the test is repeated at a voltage just below the thres hold of limiting. 1089 section 4.5.11 - current-limiting protector testing equipment that allows unacceptable current to flow during power faults (figure 16) shall be specified to use an appropriate cur rent-limiting protector. the equipment performance can be determined by testing with a series fuse, which simulates the safe current levels o f a telephone cable. if this fuse opens, the equipment allows unacceptable current flow and an external current-limiting protector must be sp ecified. for acceptable currents, the equipment must not allow current flows for times that would operate the simulator. the wiring simulato r fuse current- time characteristic shall match the boundary of figure 16. a bussmann mdq-1 6 / 10 fuse is often specified as meeting this requirement, figure 17. figure 16. wiring simulator current-time t - current duration - s 001 01 current a rms 2 2.5 3 4 5 6 7 8 15 20 25 30 40 50 60 70 80 10 1 10 100 1000 unacceptable region acceptable region '1089 wiring simulator current vs time ti6lag figure 17. mdq-1 6 / 10 current-time t - current duration - s 001 01 1 10 100 1000 current a rms 2 2.5 3 4 5 6 7 8 15 20 25 30 40 50 60 70 80 10 ti6lah unacceptable region mdq-1 6 / 10 mdq -1 6 / 10 operating current vs average melt time
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector 1089 section 4.5.11 - current-limiting protector testing (continued) the test generator has a voltage source that can be varied from zero to 600 v rms and an output resistance of 20 ? to each conductor. table 4 shows the range of currents conducted by the TISP61089B. table 4. wiring simulator testing ac duration s open-circuit rms voltage v short-circuit rms current a te s t connections primary fitted source resistance ? ? ? ? TISP61089B i tm a (peak) r s = 25 ? r s = 40 ? ? ? ? 900 0 to 600 0 to 30 transverse & longitudinal no 20 0 to 2x 19 0 to 2x 14 1089 section 4.5.12 - first-level power fault testing table 6 shows the five tests used for this section. columns 9 and 10 show the prospective currents for these tests using r s values of 25 ? and 40 ? . the two most stressful tests of this section are test 1 and test 2. as shown in table 6, the peak currents for these tests ar e 2x17 a and 2x7.7 a respectively. with the exception of test 5, all the other tests require the series overcurrent protection to operate be fore the TISP61089B current-time ratings are exceeded. in the case of test 2, with an r s of 25 ? , the overcurrent protection must operate within the initial a.c. half cycle to prevent damage. te s t # ac duration s open-circuit rms voltage v short-circuit rms current a no of te s t s te s t connections primary fitted source resistance ? ? ? ? TISP61089B i tm a (peak) r s = 25 ? r s = 40 ? ? ? ? 1 900 50 0.33 1 tr a n s v e r s e & longitudinal no 150 2x0.40 2x0.37 2 900 100 0.17 1 tr a n s v e r s e & longitudinal no 600 2x0.23 2x0.22 31 200 400 600 0.33 0.67 1.00 60 60 60 tr a n s v e r s e & longitudinal no 600 2x0.45 2x0.90 2x1.36 2x0.44 2x0.89 2x1.33 4 1 1000 1 60 longitudinal yes 1000 2x1.38 2x1.30 5 5 600 0.09 60 differential no capacitive 2x0.12 2x0.12 6 30 600 0.5 1 tr a n s v e r s e & longitudinal no 1200 2x0.69 2x0.68 7 2 600 2.2 1 tr a n s v e r s e & longitudinal no 273 2x2.85 2x2.71 8 1 600 3.0 1 tr a n s v e r s e & longitudinal no 200 2x3.77 2x3.54 9 0.5 1000 5 1 longitudinal yes 200 2x6.28 2x5.89 notes: 1. if the equipment contains a voltage-limiting device or a current-limiting device, tests 1, 2 and 3 are repeated at a le vel just below the thresholds of the limiting devices. 2. test 5 uses a special circuit with transformer coupled a.c. and capacitive feed. 3. tests 1 through 5 are requirements and the equipment shall not be damaged after these tests. 4. tests 6 through 9 are desirable objectives and the equipment can be damaged after these tests. 1089 section 4.5.13 - second-level power fault testing for central office equipment table 5 shows the nine tests used for this section. the TISP61089B will survive these peak current values as they are lower tha n the TISP61089B current-time ratings. table 5. first-level power fault currents
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector 1089 section 4.5.15 - second-level power fault testing for equipment located on the customer premise this test, table 7, is for network equipment located on the customer premises. the purpose is to ensure that the feed wiring do es not become a hazard due to excessive current. this testing is similar to the section 4.5.11 testing. if the equipment is directly wired, t he wiring simulator described in section 4.5.11 is replaced by a one-foot section of 26 awg wrapped in cheesecloth. the equipment fails if an open circuit occurs or the cheesecloth is damaged. table 7 shows the test conditions for this section. columns 7 and 8 show the prospective currents using r s values of 25 ? and 40 ? . for the TISP61089B to survive, the series overcurrent protection to operate before the TISP61089B current-time ratings are exceeded. table 7. customer premise wiring simulator testing table 6. second-level power fault currents ac duration s open-circuit rms voltage v short-circuit rms current a te s t connections primary fitted source resistance ? ? ? ? TISP61089B i tm a (peak) r s = 25 ? r s = 40 ? ? ? ? 900 0 to 600 0 to 30 transverse & longitudinal no 20 0 to 2x 19 0 to 2x 14 note: 1. if the equipment interrupts the current before the 600 v rms level is reached, a second piece of equipment is tested. the second piece of equipment shall withstand 600 v rms applied for 900 s without causing a hazard. 1089 section 4.5.16 - second-level intra-building power fault testing for equipment located on the customer premise this test, table 8, is for network equipment ports that do not serve outside lines. for standard plugable premise wiring, the w iring simulator fuse shall be used for testing. where direct wiring occurs, the simulator shall consist of a length of the wire used wrapped in cheesecloth. the equipment fails if a hazard occurs or a wiring simulator open circuit occurs or the cheesecloth is damaged. table 8. second-level power fault currents te s t # ac duration s open-circuit rms voltage v short-circuit rms current a no of te s ts te s t connections primary fitted source resistance ? ? ? ? TISP61089B i tm a (peak) r s = 8 ? r s = 25 ? r s = 40 ? ? ? ? 1 900 120 25 1 transverse & longitudinal no 5 2x13 2x5.7 2x3.8 note: 1. if the equipment contains a voltage-limiting device or a current-limiting device, these tests are repeated at a level ju st below the thresholds of the limiting devices. 1089 section 4.5.13 - second-level power fault testing for central office equipment (continued) te s t # ac duration s open-circuit rms voltage v short-circuit rms current a no of te s t s te s t connections primary fitted source resistance ? ? ? ? TISP61089B i tm a (peak) r s = 25 ? r s = 40 ? ? ? ? 1 900 120 277 25 1 1 transverse & longitudinal no 5 11 2x5.7 2x11 2x3.8 2x7.7 2 5 600 60 1 transverse & longitudinal no 10 2x24 2x17 3 5 600 7 1 transverse & longitudinal no 86 2x7.7 2x6.8 4 900 100 to 600 0.37 to 2.2 transverse & longitudinal no 270 2x2.9 2x2.7 5 900 600 0.09 60 differential no capacitive 2x0.09 2x0.09 notes: 1. if the equipment contains a voltage-limiting device or a current-limiting device, these tests are repeated at a level j ust below the thresholds of the limiting devices. 2. test 5 uses a special circuit with transformer coupled a.c. and capacitive feed.
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector 1089 section 4.5.16 (continued) dedicated intra-building ports may use an r s value of 8 ? . the 8 ? value limits the initial current to 13 a, which is within the TISP61089B single cycle rating. for the TISP61089B to survive the full 900 s test, the series overcurrent protection to operate before the TISP61089B current-time ratings are exceeded. overcurrent and overvoltage protection coordination to meet 1089, the overcurrent protection must be coordinated with the requirements of sections 4.5.7, 4.5.8, 4.5.9, 4.5.12, 4. 5.13, 4.5.15 and the TISP61089B. the overcurrent protection must not fail in the first-level tests of sections 4.5.7, 4.5.9 and 4.5.12 (tests 1 through 5). test 6 through 9 of section 4.5.12 are not requirements. the test current levels and their duration are shown in figure 18. first-leve l tests have a high source resistance and the current levels are not strongly dependent on the TISP61089B series resistor value. second-level tests have a low source resistance and the current levels are dependent on the TISP61089B r s resistor value. the two stepped lines at the top of figure 18 are for the 25 ? and 40 ? series resistor cases. the unacceptable current region (section 4.5.11) is also shown in figure 18. if current flows for the full second-level test time, the unacceptable current region will be entered. the series ov ercurrent protector must operate before the unacceptable region is reached. figure 18. 1089 test current levels maximum rms current vs time time - s 0.01 0.1 1 10 100 1000 ma ximum rms current - a 0.1 0.2 0.3 0.5 0.7 1 2 3 5 7 10 20 30 ai6xakb second level tests, 40 ? ? ? ? second level tests, 25 ? first level tests # 1 through 5, 25 ? ? ? ? & 40 ? ? ? ? objective first level tests # 6 through 9 unacceptable figure 19. TISP61089B overlay peak ac vs current duration t current duration s 0.01 0.1 1 10 100 1000 peak 50 hz / 60 hz current a 0.15 0.2 0.3 0.4 0.5 0.6 0.8 1.5 2 3 4 5 6 8 15 20 30 40 50 1 10 ai6xdm second level tests, 40 ? ? ? ? second level tests, 25 ? ? ? ? unacceptable v gg = -60 v first level tests # 1 through 5, 25 ? ? ? ? & 40 ? ? ? ? v gg = -120 v fusible overcurrent protectors cannot operate at first-level current levels. thus, the permissible low current time-current bou ndary for fusible overcurrent protectors is formed by the first-level test currents. automatically resettable overcurrent protectors (e.g. positi ve temperature coefficient thermistors) may operate during first-level testing, but normal equipment working must be restored after the test h as ended. at system level, the high current boundary is formed by the unacceptable region. however, component and printed wiring, pw, cur rent limitations will typically lower the high current boundary. although the series line feed resistance, r s , limits the maximum available current in second-level testing, after about 0.5 s this limitation will exceed the acceptable current flow values. these three boundaries, first-level, second-level and unacceptable, are replotted in terms of peak current rather than rms curr ent values in figure 19. using a peak current scale allows the TISP61089B longitudinal current rating curves (figure 3) to be added to figure 19. assuming the pw is sized to adequately carry any currents that may flow, the high current boundary for the overcurrent protector is form ed by the TISP61089B rated current. note that the TISP61089B rated current curve also depends on the value of gate supply voltage.
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector overcurrent and overvoltage protection coordination (continued) the overcurrent protector should not allow current-time durations greater than the TISP61089B current ratings, otherwise the ti sp61089b may fail. a satisfactory fusible resistor performance is shown in figure 20. the line feed resistor (lfr) current-time curve is above the first-level currents and below the TISP61089B rated current for v gg > -100 v. this particular curve is for a bourns 4b04b-523-400 2 x 40 ? , 2 % tolerance, 0.5 % matched resistor module. fusible resistors are also available with integrated thermal fuses or ptc thermistors . thermal fuses will cause a rapid drop in the operating current after about 10 s. figure 20 shows the fused lfr curve for a bourns 4b04b-524-4 00 2 x 40 ? , 2 % tolerance, 0.5 % matched resistor module with integrated thermal fuse links. the bourns 4b04b-524-400 allows the TISP61089B to operate down to its full rated voltage of v gg = -155 v. an lfr with integrated ptc thermistors will give an automatically resettable current limiting function for all but the highest currents. figure 20. line feed resistor - with and without thermal fuse peak ac vs current duration t current duration s 0.01 0.1 1 10 100 1000 peak 50 hz / 60 hz current a 0.15 0.2 0.3 0.4 0.5 0.6 0.8 1.5 2 3 4 5 6 8 15 20 30 40 50 1 10 ai6xdka first level te st s # 1 through 5, 25 ? ? ? ? & 40 ? ? ? ? fused lfr lfr v gg = -60 v v gg = -120 v ceramic ptc thermistors are available in suitable ohmic values to be used as the series line feed resistor r s . figure 21 overlays a typical ceramic ptc thermistor operating characteristic. some of the first-level tests will cause thermistor operation. generally, the resistance matching stability of the two ptc thermistors after power fault switching lightning will meet the required line balance perform ance. ceramic ptc thermistors reduce in resistance value under high voltage conditions. under high current impulse conditions, the re sistance can be less than 50 % of the d.c. resistance. this means that more current than expected will flow under high voltage impulse condi tions. the manufacturer should be consulted on the 2/10 currents conducted by their product under 1089 conditions. to keep the 2/10 curre nt below 120 a, an increase of the ptc thermistor d.c. resistance value to 50 ? or more may be needed. in controlled temperature environments, where the temperature does not drop below freezing, the TISP61089B 2/10 capability is about 170 a, and this would allow a lower value of resistance. generally, polymer ptc thermistors are not available in sufficiently high ohmic values to be used as the only line feed resista nce. to meet the required resistance value, an addition (fixed) series resistance can be used. figure 22 overlays a typical polymer ptc thermist or operating characteristic. compared to ceramic ptc thermistors, the lower thermal mass of the polymer type will generally give a faster cu rrent reduction time than the ceramic type. however, in this case the polymer resistance value is much less than the ceramic value. for the sam e current level, the dissipation in the polymer thermistor is much less than the ceramic thermistor. as a result, the polymer thermistor is slow er to operate than the ceramic one. the resistance stability of polymer ptc thermistors is not as good as ceramic ones. however, the thermistor resistance change w ill be diluted by additional series resistance. if an slic with adaptive line balance is used, thermistor resistance stability may not be a pr oblem. polymer ptc thermistors do not have a resistance decrease under high voltage conditions.
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector overcurrent and overvoltage protection coordination (continued) figure 21. ceramic ptc thermistor peak ac vs current duration t current duration s 0.01 0.1 1 10 100 1000 peak 50 hz / 60 hz current a 0.15 0.2 0.3 0.4 0.5 0.6 0.8 1.5 2 3 4 5 6 8 15 20 30 40 50 1 10 ai6xdia ceramic ptc thermistor first level tests # 1 through 5, 25 ? ? ? ? & 40 ? ? ? ? v gg = -60 v v gg = -120 v figure 22. polymer ptc thermistor peak ac vs current duration t current duration s 0.01 0.1 1 10 100 1000 peak 50 hz / 60 hz current a 0.15 0.2 0.3 0.4 0.5 0.6 0.8 1.5 2 3 4 5 6 8 15 20 30 40 50 1 10 ai6xdja polymer ptc thermistor first level tests # 1 through 5, 25 ? ? ? ? & 40 ? ? ? ? v gg = -60 v v = -120 v gg
october 2000 - revised july 2008 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP61089B high voltage ringing slic protector mechanical data device symbolization code devices will be coded as below. device symbolization code TISP61089B 61089b tisp is a trademark of bourns, ltd., a bourns company, and is registered in u.s. patent and trademark office. bourns is a registered trademark of bourns, inc. in the u.s. and other countries.

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